AMD’s Zen architecture has received high praise, and rumours about the impending Zen 5 and Zen 5C-powered EPYC Turin series CPUs have begun to circulate. These leaks give enthusiasts and industry professionals insight into the potential capabilities and features of these next-generation processors, giving them something to look forward to.
Insights from Moore’s Law is Dead Roadmap
The most recent rumours come from the reliable source Moore’s Law is Dead, whose roadmap reveals the next-generation EPYC CPU families set to be delivered between 2024 and 2025.
Among these families, AMD has announced Turin as its next-generation EPYC lineup, which will have both Zen 5 and Zen 5C cores. Let’s take a closer look at what we may expect from these fascinating CPUs.
AMD EPYC Turin (Classic) with Zen 5: A Powerhouse with Up to 128 Cores
The AMD EPYC Turin (Classic) family will retain the chiplet design while offering remarkable specifications. The Turin series provides enormous processing capacity for demanding tasks, with a maximum of 128 cores, 256 threads, and adjustable TDPs reaching up to 500W.
Notably, certain SKUs may even handle TDPs of up to 600W, according to a recent Gigabyte leak. Based on the Zen 4 platform, these chips will have comparable L2 and L3 cache layouts, with a small increase to the L1 cache.
The cache arrangement in Zen 5 chips is projected to use a “Ladder” hierarchy, which is a significant improvement. These devices, which will use the advanced TSMC 4nm process node, are expected to go into production in Q1 2024.
The EPYC Turin (Classic) series, which is set to debut in the third quarter of 2023, claims to give great performance and efficiency.
AMD EPYC Turin-X: 3D V-Cache for Improved Cache Capabilities
The AMD EPYC Turin-X series, which features a revolutionary 3D V-Cache, is another exciting addition to the range. These chips will include 64MB of 3D V-Cache per CCD, for a total of 1024 MB across the 16 CCDs. They will also have 512 MB of standard L3 cache, for a total L3 cache capacity of 1536 MB or 1.5 GB.
When paired with the 1 MB per core L2 cache (128 MB total), the total cache capacity, excluding the L1 cache, reaches an incredible 1664 MB. This equates to a 33% increase in cache over the future Genoa-X CPU family, resulting in improved speed and responsiveness.
AMD EPYC Turin Dense & Turin AI: Zen 5C Supported with Up to 192 Cores
The AMD EPYC Turin Dense CPUs, which are slated to supplant the Bergamo family, are introduced in the Zen 5C portfolio. Although the moniker Turin Dense has not been verified, these chips are expected to use 3nm Zen 5C cores and offer up to 192 core SKUs.
While these processors have TDPs of up to 500W, their most exciting feature is that they may go into production before ordinary Turin chips. Insiders suspect that the faster timeframe is intended to compete directly with Intel’s Sierra Forest 144 core CPUs, which are expected to ship in the first half of 2024.
Furthermore, AMD is developing Turin AI, a secondary Turin Dense chip that will have Zen 5C cores as well as an AI chiplet. Despite the lack of specifics, it is expected that Xilinx IP will power the AI chiplet in order to meet the growing need for AI-specific applications.
With AI taking centre stage as AMD’s strategic focus, embedding dedicated AI technology within EPYC CPUs is a logical step forward in effectively meeting client needs.
AMD EPYC Siena Successor: Sorano with Zen 4/4C Cores
Aside from the Zen 5 and Zen 5C-powered Turin series, AMD is also pushing the envelope in its more mainstream and low-cost segments. The Sorano series will replace the AMD EPYC 8004 “Siena” lineup, which includes Zen 4/4C cores.
These CPUs will have up to 64 cores, a 225W TDP, support for 6-channel memory, and 96 PCIe Gen 5 interconnects. The Sorano range is planned to go into production in the second half of 2024, with availability in 2025.
AMD’s Data Center and AI Technology Premiere
AMD has already announced the “AMD Data Centre and AI Technology Premiere,” which will serve as a platform for key server and data centre announcements. This event, which is scheduled for June, will most likely reveal further information about upcoming products and the exciting advances around AMD’s EPYC CPUs.
The Zen 5 CPUs Price
Zen 5 server CPUs’ pricing will likely be akin to Zen 4 server CPUs, based on current AMD pricing. Zen 4 server CPUs range from $499 to $999. Milan-X has 64 cores, while Genoa has 96. Zen 5 server CPUs due in 2024. Prices may rise with inflation. AMD competes well in servers. Zen 5 CPUs will likely have competitive pricing against Intel’s.
Here is a table of the expected prices of the Zen 5 server CPUs based on the pricing of the Zen 4 server CPUs:
|Cores||Zen 4 Price||Zen 5 Expected Price|
AMD EPYC CPU Latest 3 Families
|FAMILY NAME||AMD EPYC VENICE||AMD EPYC TURIN||AMD EPYC SIENA||AMD EPYC BERGAMO|
|Family Branding||EPYC 11K?||EPYC 10K?||EPYC 8004||EPYC 9004|
|CPU Architecture||Zen 6?||Zen 5||Zen 4||Zen 4C|
|Process Node||TBD||3nm TSMC?||5nm TSMC||4nm TSMC|
|Platform Name||TBD||SP5 / SP6||SP6||SP5|
|Socket||TBD||LGA 6096 (SP5)||LGA 4844||LGA 6096|
|LGA XXXX (SP6)|
|Max Core Count||384?||128?||64||128|
|Max Thread Count||768?||256?||128||256|
|Max L3 Cache||TBD||TBD||256 MB?||TBD|
|Chiplet Design||TBD||TBD||8 CCD’s (1CCX per CCD) + 1 IOD||12 CCD’s (1 CCX per CCD) + 1 IOD|
|Memory Channels||TBD||12 Channel (SP5)||6-Channel||12 Channel|
|PCIe Gen Support||TBD||TBD||96 Gen 5||160 Gen 5|
|TDP (Max)||TBD||480W (cTDP 600W)||70-225W||320W (cTDP 400W)|
AMD’s Zen 5 and Zen 5C EPYC Turin series CPUs are stirring up excitement in the tech community. More cores, better cache, smarter AI – chips could change server CPUs. As we await AMD’s next event, insiders speculate about the potential game-changing possibilities.